525.428 - Introduction to Digital CMOS VLSI Course Homepage
Instructor Information
Mark Martin
Email: mark.martin@jhuapl.eduWork Phone: (443) 778-7895
Course Information
Course Description
The objective of this course is to familiarize the student with the process of implementing a digital system as a full custom, integrated circuit. Upon completion, the student will be capable of completing skills to perform basic VLSI design from circuit concept to mask layout and simulation. Students will have the opportunity to have their projects fabricated at no cost through the MOSIS educational program. Topics include device fabrication, mask layout, introductory MOSFET physics, standard CMOS logic design, hierarchical IC design, and circuit simulation. Students will design, simulate, and do mask level layout of a circuit using a modern CMOS process.
Prerequisites
525.411 Theory of Digital Systems or equivalent background in digital design.
Course Goal
The objective of this course is to familiarize the student with the process of implementing a digital system as a full custom, integrated circuit. Upon completion, the student will be capable of completing skills to perform basic VLSI design from circuit concept to mask layout and simulation. Students may have the opportunity to have their projects fabricated at no cost through the MOSIS educational program. Topics include device fabrication, mask layout, introductory MOSFET physics, standard CMOS logic design, hierarchical IC design, and circuit simulation. Students will design, simulate, and do mask level layout of a circuit using a CMOS process.
Course Objectives
- By the end of the course, students should be able to:
Identify and analyze the operation of basic digital circuit elements such as combitorial logic, flip-flops, adders, memories, etc.
- Perform computer simulations of circuits to determine the expected behavior.
- Perform mask level layout of integrated circuits are the transistor level.
When This Course is Typically Offered
This course is typically offered in the fall term at APL
Syllabus
Topics Covered
- CMOS fabrication
- Physical design rules
- Switching logic
- MOS transistor physics
- Modeling and simulation
- DC characteristics of logic gates
- flip-flops
- arthemetic structures
- Input-ouput structures
- memory subsystems
Student Assessment Criteria
| Homework | 15% |
| Mid-term Exam | 35% |
| Final Project | 50% |
All homework is due within one week of its assignment. Furthermore all homework must be completed for a passing grade. Late homework will be accepted will penalty.
It is assumed that graduate students in EE are familiar with basic transistors operation, combitorial and sequential logic, opeartion and design. While these topics will be briefly reviewed. students are encouraged to familiarize themselves with the material before the course begins.
Computer and Technical Requirements
This course makes use of various freely availeable EDA tools targeted for circuit simulation and intergrated circuit design. Many of these tools operate on the UNIX/Linux platforms. If you are not familar with UNIX it is recomended you consult an introductory text.
Participation Expectations
Class particiaption in encouraged. Projects groups are limited to groups of 2 unless otherswise agreed upon by the instructor. Weekly homework will be given. All exams are in-class. The final projrct includes a written report as well as an in-class oral presentation of your proejct.
Textbooks
Textbook information for this course is available online through the MBS Direct Virtual Bookstore.
Course Notes
There are no notes for this course.
Final Words from the Instructor
The final project often consumes a large amount of the students time toward the last half of the semester. Students should consider their overall class work load when taking this course.
(Last Modified: 08-18-2009 at 11:35:15 AM)