Course Number
525.612
Next Offered
Spring 2025
Location
Online
Course Format
Asynchronous Online

This course focuses on digital hardware design for all major components of a modern, reduced-instructionset computer. Topics covered include instruction set architecture; addressing modes; register-transfer notation; control circuitry; pipelining with hazard control; circuits to support interrupts and other exceptions; microprogramming; computer addition and subtraction circuits using unsigned, two’s-complement, and excess notation; circuits to support multiplication using Robertson’s and Booth’s algorithms; circuits for implementing restoring and non-restoring division; squareroot circuits; floating-point arithmetic notation and circuits; memory and cache memory systems; segmentation and paging; input/output interfaces; interrupt processing; direct memory access; and several common peripheral devices, including analog-to-digital and digital-to-analog converters. A mini-project is required.

Course Prerequisite(s)

EN.525.642 FPGA Design using VHDL or prior knowledge of a hardware description language for FPGA design

Course Offerings

Waitlist Only

Computer Architecture

525.612.81
01/21/2025 - 05/06/2025
Semester
Spring 2025
Course Format
Asynchronous Online
Location
Online
Cost
$5,270.00
Course Materials
Waitlist Only

Computer Architecture

525.612.82
01/21/2025 - 05/06/2025
Semester
Spring 2025
Course Format
Asynchronous Online
Location
Online
Cost
$5,270.00
Course Materials