Dr. Ramsey Hourani

Program Coordinator Electrical and Computer Engineering

Personal Bio

Ramsey Hourani received his B.S. degree in Electrical and Computer Engineering from Iowa State University in 1998 and M.S. degree in Electrical and Computer Engineering in 2001 and PhD in 2008, both from North Carolina State University. Before continuing with his graduate studies, Ramsey worked for two years with the Cellular Subscriber Sector at Motorola as a hardware designer for CDMA wireless systems from 1998 to 2000. He also served for two years as an instructor teaching undergraduate courses in electrical engineering at UNC Charlotte from 2000 to 2002.

Ramsey has been teaching at The Johns Hopkins University since 2009 teaching a course in VHDL design for FPGAs. He also serves as the program coordinator for the ECE department at the EP program. Ramsey has also been working at The Johns Hopkins University Applied Physics Lab (APL) since 2008. His primary expertise lies in VHDL code development for space flight particle and optical instruments. He has experience with Synplify, Xilinx ISE and Vivado, Modelsim, and Microsemi tools.

Education History

  • BS Electrical Engineering, Iowa State University
  • MS Electrical Engineering, North Carolina State University
  • PhD Electrical Engineering, North Carolina State University

Work Experience

Senior Professional Staff, JHU Applied Physics Laboratory


1. R. Hourani, H. Alassaly, and W. Alexander, “Hardware Implementation of IIR Digital Filters for Programmable Devices”, 2013 IEEE International Conference on Electronics, Circuits, and Systems, December 2013

2. Gurnee, R.S.; Livi, S.; Phillips, M.L.; Desai, M.I.; Hayes, J.R.; Ho, G.C.; Hourani, R.; Jaskulek, S.; Scheer, J.; , "Strofio: A novel neutral mass spectrograph for sampling Mercury's exosphere," Aerospace Conference, 2012 IEEE , vol., no., pp.1-11, 3-10 March 2012

3. Ramsey Hourani, Ravi Jenkal , W. Rhett Davis, Winser Alexander, "Automated Design Space Exploration for DSP Applications" The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, May 2008

4. R. Hourani, I. Dalal , W. R. Davis, W. Alexander, “An Efficient VLSI Implementation for the 1D Convolutional Discrete Wavelet Transform”, International Midwest Symposium on Circuits and Systems, May 2008

5. R. Hourani, Y. Kim, S. Ocloo, and W. Alexander, “Automated Hardware IP Generation for Digital Signal Processing Applications”, IEEE 40th ASILOMAR Conf. on Signals, Systems and Computers, Nov. 2006

Honors and Awards

  • Exceptional Online Course Design Award (2016)